The present invention relates to the field of electronic circuit technology; specifically it relates to a method and device for operating an EEPROM (Electrically Erasable Programmable Read-only Memory).
In an electrical erasable programmable read-only memory (EEPROM), data is stored in an erase and program cycle including an erase operation and a program operation in a data area pointed to by the same address. FIG. 1 is a diagram illustrating data status in an erase and program cycle. As shown in FIG. 1, before the erase operation is started, the data status is in a valid state. During the erase operation, the data status is indeterminate or uncertain. When the erase operation is completed, the data status is in an erased state. At this time, a program operation is started to write new data in the data area, and the data status is indeterminate or uncertain. When the program operation is completed, the data status becomes a valid state. In the operation illustrated in FIG. 1, the data can be lost, if the erase or program operation is interrupted when the data status is uncertain or erased.
In order to prevent data loss, a backup mechanism is often employed, in which a target data area and a backup data area are used to store the same data. If the data in the target area is corrupted, the backup data area can be used to restore the data. FIG. 2 is a diagram illustrating a data storage method in a conventional backup system. In this example, data area #1 is used as a target data area, and data area #2 is used as a backup data area. The erase and program operations in each erase and program cycle in both data areas are the same as those described above in connection to FIG. 1. In FIG. 2, when an erase and program cycle is finished in data area #1, the system performs a second erase and program cycle in the backup data area to store the same data. It can be seen that, during erase-program cycle #2, the data in data area 1 is valid, with data #1 stored therein. Similarly, in the next erase and program cycle, erase-program cycle #3, new data, e.g., data #2, will be written in data area 1. During erase-program cycle #3, the data in data area #2 is valid. Therefore, if an operation is interrupted and the data status is either uncertain or erased, a valid data is available in one of the two data areas.